Verilog is a Hardware Description Language (HDL) used for designing, modeling, and verifying digital circuits and systems, especially for applications in FPGA development, ASIC design, and embedded systems engineering.
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What is a FPGA?
FPGA stands for Field Programmable Gate Arrays. FPGAs are integrated circuits that are easily reprogrammable, where you can pick and choose the hardware components you would like to use.
We use the Basys 3 board for this example as it is convenient and the software (Vivado) is free to download.
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What is ASIC?
ASIC stands for Application-Specific Integrated Circuit. It refers to a type of integrated circuit that is custom-designed for a particular use or application, rather than being intended for general-purpose use. Some examples of ASICs include chips used in smartphones, Bitcoin miners, or specific industrial devices.
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Many major tech companies such as Apple, Google, AMD, and Intel use Verilog to do hardware design and manufacturing, so if you are interested in working in this field, learning Verilog is a critical skill to have!
For this particular project, what you need to know are:
Here is a website you can use to learn more Verilog: Nandland.com
Waveforms are the output of your written Verilog code. They show all the possible outputs of every variable you have created over a period of time. Below is an example of what a waveform looks like:
The pink line is the cursor, and you can increment it over one clock cycle (indicated by the first waveform). You can also drag it around to jump to a specific clock cycle.
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What is a clock cycle?
You can think of the clock cycle as the base unit of time for your electronic device. Every event or change that occurs in your device (at least for this project) will occur at “edge-trigger”, which means that when your clock is transitioning from 1 to 0, or 0 to 1, is when all your components will update their values.
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As you increment over various clock cycles, you will see change in the value of your variables. Since we are dealing with the building blocks of digital logic,
Link to demo GitHub project: https://github.com/oconnt0351/NSF-Includes-FPGA-Frogger