Introduction

This module covers the advanced tools in the schematic designer that you can use to both optimize your digital topologies and wade into the more complex world of analog IC design. This module assumes you are competent with the basics of Cadence Virtuoso and self‑sufficient with simulation. If you haven’t already, complete the two prior modules before attempting this one.

Initializing and Using a Cadence Virtuoso Environment with the NCSU FreePDK45 Basekit

Digital IC Analog Simulation

1: Why Have We Been Using VTG?

So far, these modules have always been using the VTG versions of the MOSFETs because they are the most common and balanced ones. However, they are not your only options. You might wonder what VTG means and why we use it. The short answer: VTG balances leakage and speed, so until you know when to use other thresholds, it’s the safest default. But you made it this far, so here is the long answer.

Both NMOS and PMOS have four basic types, which are VTH, VTG, VTL, and THKOX. IC designers use all four of these, but THKOX is used entirely differently than the other three, and almost exclusively for analog ICs, so it isn’t discussed here.

Name Meaning Primary Property Secondary Properties Applications
VTH High Threshold Voltage Large voltage difference between gate and source required for current to flow between source and drain As a result of the large threshold voltage, the nominal off state (GND for PMOS, VDD for NMOS) is further from the threshold voltage, so VTH MOSFETs have the least current leakage of all types

The consequence for having a large threshold voltage and low current leakage, is a slower switching speed. Because the threshold voltage is higher, it takes longer for whatever comes before VTHs to charge them to their threshold voltages. In other words, VTHs have the largest delays of all types. | Maximizing power efficiency, especially when substantial standbys are expected, like in battery operated equipment that idles the vast majority of the time. | | VTG | General (Average) Threshold Voltage | Generally optimized voltage difference between gate and source required for current to flow between source and drain | Balanced threshold voltage means intermediate switching speed and leakage current. They are optimized for standard logic use cases, which are more common than the applications of either VTH or VTL transistors, so they are the most common of the types | General logic applications. In most digital logic, we want to balance power consumption and speed. These are what you will find in any standard logic IC. | | VTL | Low Threshold Voltage | Small voltage difference between gate and source required for current to flow between source and drain | Because of the low threshold voltage, it takes less time for the state of VTLs to change compared to other MOSFETs, since regardless of the charging/discharging rate, a lower threshold means the threshold will be achieved faster.

The cost that this increase in speed comes at is however that since the nominally off states are closer to the threshold voltages, (what allows them to switch faster) they also have the highest current leakage of all MOSFETs. | Highest performance and most critical paths. When we are willing to sacrifice substantial power for performance, VTLs offer us an extra boost of performance through unbeatable switching speeds. |

The threshold voltage is controlled through material science involving doping concentrations and dielectric properties, which falls too far into semiconductor manufacturing for the scope of this module, but is another very interesting part of the IC manufacturing process.

Multi Threshold CMOS, or MTCMOS technology is the practice of using multiple different thresholds in a single die (chip). This works on roughly the same principle of efficiency as chiplets if you know what those are. Basically, in a die, we have lots of different subsystems, some of them really need high speed, others which really don’t. If we make all our MOSFETS with the same threshold voltage, we need to make tradeoffs and pick just one threshold voltage overall. So like with chiplets, for the cost of increased complexity in manufacturing, we can just have our cake and eat it too, we can put transistors of different threshold voltages right into the same die and optimize each one separately.